1 ? august 2002 HFA1114 850mhz video cable driving buffer fn3151.4 features ? access to summing node allows circuit customization ? user programmable for closed-loop gains of +1, -1 or +2 without use of external resistors ? wide -3db bandwidth . . . . . . . . . . . . . . . . . . . . 850mhz ? very fast slew rate . . . . . . . . . . . . . . . . . . . . 2400v/ s ? fast settling time (0.1%) . . . . . . . . . . . . . . . . . . . . 11ns ? high output current . . . . . . . . . . . . . . . . . . . . . . . 60ma ? excellent gain accuracy . . . . . . . . . . . . . . . . . . 0.99v/v ? overdrive recovery . . . . . . . . . . . . . . . . . . . . . . . <10ns ? standard operational amplifier pinout applications ? rf/if processors ? driving flash a/d converters ? high speed communications ? impedance transformation ? line driving ? video switching and routing ? radar systems ? medical imaging systems description the HFA1114 is a closed loop buffer featuring user programmable gain and ultra high speed performance. manufactured on intersil? propr ietary complementary bipolar uhf-1 process, the HFA1114 offers a wide -3db bandwidth of 850mhz, very fast slew rate , excellent gain flatness, low distortion and high output current. a unique feature of the pinout allows the user to select a voltage gain of +1, -1, or +2, without the use of any external components. gain selection is accomplished via connections to the inputs, as described in the ?application information? section. the result is a more fl exible product, fewer part types in inventory, and more efficient use of board space. compatibility with existing op amp pinouts provides flexibility to upgrade low gain amplifiers, while decreasing component count. unlike most buffers, the standard pinout provides an upgrade path should a higher closed loop gain be needed at a future date. for applications requiring a standard buffer pinout, please refer to the hfa1110 datasheet. pinout HFA1114 (soic) top view pin descriptions ordering information part number (brand) temp. range ( o c) package pkg. no. HFA1114ib (h1114i) -40 to 85 8 ld soic m8.15 hfa11xxeval dip evaluation board for high speed op amps nc -in +in v- 1 2 3 4 8 7 6 5 nc v+ out sn + - 300 300 name pin number description nc 1, 8 no connection -in 2 inverting input +in 3 non-inverting input v- 4 negative supply sn 5 summing node out 6 output v+ 7 positive supply caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a trademark of intersil americas inc. copyright ? intersil americas inc. 2002. all rights reserved
2 absolute maximum ratings thermal information voltage between v+ and v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12v dc input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v supply differential input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5v output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60ma operating conditions temperature range . . . . . . . . . . . . . . . . . . . . . . . . . -40 o c to 85 o c thermal resistance (typical, note 1) ja ( o c/w) soic package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 170 maximum junction temperature (die). . . . . . . . . . . . . . . . . . . . 175 o c maximum junction temperature (plastic package) . . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic - lead tips only) caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditi ons above those indicated in the operational sections of this specification is not i mplied. note: 1. ja is measured with the component mount ed on an evaluation pc board in free air. electrical specifications v supply = 5v, a v = +1, r l = 100 ?, unless otherwise specified parameter test conditions temp. ( o c) min typ max units input characteristics output offset voltage 25 - 8 25 mv full - - 35 mv output offset voltage drift full - 10 - v/ o c psrr 25 39 45 - db full 35 - - db input noise voltage 100khz 25 - 9 - nv/ hz non-inverting input noise current 100khz 25 - 37 - pa/ hz non-inverting input bias current 25 - 25 40 a full - - 65 a non-inverting input resistance 25 25 50 - k ? inverting input resistance 25 240 300 360 ? input capacitance either input 25 - 2 - pf input common mode range full 2.5 2.8 - v transfer characteristics gain a v = +1, v in = +2v 25 0.980 0.990 1.02 v/v full 0.975 - 1.025 v/v a v = +2, v in = +1v 25 1.96 1.98 2.04 v/v full 1.95 - 2.05 v/v dc non-linearity a v = +2, 2v full scale 25 - 0.02 - % output characteristics output voltage a v = -1 25 3.0 3.3 - v full 2.5 3.0 - v output current a v = -1, r l = 50 ? 25, 85 50 60 - ma -40 o c35 50 - ma closed loop output impedance a v = +2, dc 25 - 0.3 - ? HFA1114
3 power supply characteristics supply voltage range full 4.5 - 5.5 v supply current 25 - 21 26 ma full - - 33 ma ac characteristics -3db bandwidth (v out = 0.2v p-p )a v = -1 25 - 800 - mhz a v = +1 25 - 850 - mhz a v = +2 25 - 550 - mhz slew rate (v out = 5v p-p )a v = -1 25 - 2400 - v/ s a v = +1 25 - 1500 - v/ s a v = +2 25 - 1900 - v/ s full power bw 5v p-p , a v = +2 25 - 220 - mhz gain flatness to 30mhz, a v = +2 25 - 0.015 - db gain flatness to 100mhz, a v = +2 25 - 0.07 - db 2nd harmonic distortion 50mhz, v out = 2v p-p 25 - -53 - dbc 3rd harmonic distortion 50mhz, v out = 2v p-p 25 - -68 - dbc 3rd order intercept 100mhz, a v = +2 25 - 28 - dbm 1db compression 100mhz, a v = +2 25 - 19 - dbm rise time (v out = 0.5v step) a v = +2 25 - 700 - ps a v = +1 25 - 480 - ps overshoot v out = 0.5v step, a v = +2 25 - 6 - % 0.1% settling time v out = 2v to 0v 25 - 11 - ns 0.05% settling time v out = 2v to 0v 25 - 15 - ns overdrive recovery time 25 - 8.5 - ns differential gain a v = +1, 3.58mhz, r l = 150 ? 25 - 0.03 - % a v = +2, 3.58mhz, r l = 150 ? 25 - 0.02 - % differential phase a v = +1, 3.58mhz, r l = 150 ? 25 - 0.05 - degrees a v = +2, 3.58mhz, r l = 150 ? 25 - 0.04 - degrees electrical specifications v supply = 5v, a v = +1, r l = 100 ?, unless otherwise specified (continued) parameter test conditions temp. ( o c) min typ max units HFA1114
4 application information closed loop gain selection the HFA1114 features a novel design which allows the user to select from three closed loop gains, without any external components. the result is a more flexible product, fewer part types in inventory, and more efficient use of board space. this ?buffer? operates in closed loop gains of -1, +1, or +2, and gain selection is accomplished via connections to the inputs. applying the input signal to +in and floating -in selects a gain of +1, while grounding -in selects a gain of +2. a gain of -1 is obtained by applying the input signal to -in with +in grounded. the table below summarizes these connections: pc board layout the frequency response of this amplifier depends greatly on the amount of care taken in designing the pc board. the use of low inductance components such as chip resis- tors and chip capacitors is strongly recommended, while a solid ground plane is a must! attention should be given to decoupling the power supplies. a large value (10 f) tantalum in parallel with a small value (0.1 f) chip capacitor wor ks well in most cases. terminated microstrip signal lines are recommended at the input and output of the device. capaci tance directly on the output must be minimized, or isolated as discussed in the next section. for unity gain applications, care must also be taken to minimize the capacitance to ground seen by the amplifier?s inverting input. at higher frequencies this capacitance will tend to short the -input to gnd, resulting in a closed loop gain which increases with frequency. this will cause excessive high frequency peaking and potentially other problems as well. an example of a good high freq uency layout is the evaluation board shown in figure 2. driving capacitive loads capacitive loads, such as an a/d input, or an improperly terminated transmission line will degrade the amplifier?s phase margin resulting in frequency response peaking and possible oscil- lations. in most cases, the oscillation can be avoided by placing a resistor (r s ) in series with the output prior to the capacitance. figure 1 details starting points for the selection of this resis- tor. the points on the curve indicate the r s and c l combina- tions for the optimum bandwidth, stability, and settling time, but experimental fine tuning is recommended. picking a point above or to the right of the curve yields an overdamped response, while points below or left of the curve indicate areas of underdamped performance. r s and c l form a low pass network at the output, thus limiting system bandwidth well below the amplifier band- width of 850mhz. by decreasing r s as c l increases (as illustrated in the curves), the maximum bandwidth is obtained without sacrificing stability. even so, bandwidth does decrease as you move to the right along the curve. for example, at a v = +1, r s = 50 ? , c l = 30pf, the over- all bandwidth is limited to 300mhz, and bandwidth drops to 100mhz at a v = +1, r s = 5 ? , c l = 340pf. evaluation board the performance of the HFA1114 may be evaluated using the hfa11xx evaluation board, slightly modified as follows: 2. remove the 500 ? feedback resistor (r 2 ), and leave the connection open. 3. a. for a v = +1 evaluation, remove the 500 ? gain setting resistor (r 1 ), and leave pin 2 floating. b. for a v = +2, replace the 500 ? gain setting resistor with a 0 ? resistor to gnd. 4. isolate pin 5 from the stray board capacitance to minimize peaking and overshoot. the layout and modified schematic of the board are shown in figure 2. to order evaluation boards (part number hfa11xxeval), please contact your local sales office. note: the soic version may be evaluated in the dip board by using a soic-to-dip adapter su ch as aries electronics part number 08-350000-10. gain (a cl ) connections +input (pin 3) -input (pin 2) -1 gnd input +1 input nc (floating) +2 input gnd r s ( ? ) load capacitance (pf) 50 45 40 35 30 25 20 15 10 5 0 0 40 80 120 160 200 240 280 320 360 400 a v = +1 a v = +2 figure 1. recommended seri es output resistor vs load capacitance 1 2 3 4 8 7 6 5 +5v 10 f 0.1 f v h 50 ? gnd gnd r 1 -5v 0.1 f 10 f 50 ? in out v l (a v = +1) or 0 ? (a v = +2) v h +in v l v+ gnd 1 v- out top layout bottom layout x figure 2. evaluation board schematic and layout HFA1114
5 all intersil semiconductor products are manufactured, assembled and tested under iso9000 quality systems certification. intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design and/o r specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnished by int ersil is believed to be accurate and reli- able. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of patents o r other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its sub sidiaries. for information regarding intersil corporation and its products, see web site http://www.intersil.com die characteristics die dimensions: 63 mils x 44 mils x 19 mils 1600 m x 1130 m x 483 m metallization: type: metal 1: aicu(2%)/tiw thickness: metal 1: 8k ? 0.4k ? type: metal 2: aicu(2%) thickness: metal 2: 16k ? 0.8k ? passivation: type: nitride thickness: 4k ? 0.5k ? transistor count: 52 substrate potential (powered up): floating (recommend connection to v-) metallization mask layout HFA1114 nc v- nc sn out +in -in nc v+ HFA1114
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